This disclosure is related to positioning of edges of one or more data strobe signals within a computing platform.
As interfaces between components in computing platforms and/or between units within integrated circuits increase in transmission speed and/or bus width, noise and signal integrity issues increase in importance. For some computing platforms, data transfer interfaces may include data that is latched at a receiving device or unit in response to rising and/or falling edges of a strobe signal generated by a transmitting device or unit. One example of such an interface is a double data rate (DDR) memory interface. As data rates increase, the issue of timing skew between the strobe signal and one or more data lines becomes increasingly important. Variations in the duty cycle of the strobe signal may also increase in importance as the data rates of the interfaces increase.